Verilog

product on 3 shows · 2 statements across 2 episodes · said 13 times in 3 episodes since 2018

Cheeky Pint 9 the a16z Podcast 2 All-In 2

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Cheeky Pint 9the a16z Podcast 2All-In 2

2026 9 mentions in 1 episode
2021 2 mentions in 1 episode
2018 2 mentions in 1 episode

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2 statements about Verilog, every show

CHEEKY PINT Assertion Not checkable as stated
Pope: AI labs apply RL to software code, not chip architecture
“Models are extremely good at Rust and Python. They've done a lot of RL on them. They have not done as much RL on Verilog. They've done almost none on, okay, write, write me a markdown file that describes a chip architecture.”
Reiner Pope Feb 26, 2026 ▶ 45:39 Reiner Pope of MatX on accelerating AI with transformer-optimized chips
a16z Assertion Supported
Pande: MIT's Cello designs biochemical circuits in Verilog with 90% accuracy
“Bioengineers from MIT have written a software called Cello, which allows them to do exactly the same thing for biochemical circuits. You first code the circuit, in this case, in the very same language, in Verilog, the same language you'd use to code electronic…”
Vijay Pande Jan 11, 2018 ▶ 14:27 When Biology Moves to Engineering

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