Neil Movva, co-founder of Sail Research, discusses why NVIDIA's NVLink interconnect is essential for low-latency model inference across multi-GPU setups.
Opinion
Losing TSMC Wouldn't Be Disastrous Because Intel Is Only 2x Behind
“And my contrarian take is that it wouldn't be that bad. Supply would take a shock for sure, but The best processes that we have in the West, like Intel, not that far behind, at worst, like maybe two X worst performance per watt. And the gap is just far smaller…”
Disclosure
Movva: Sail Research will buy data centers with only 95% uptime
“You'd have missing zero buyers for a data center that is 95% uptime. I'm that first buyer. I will buy 95% uptime.”
Assertion Not checkable as stated
Nvidia's BF16 Efficiency Barely Improves Across Hopper, Blackwell, and Rubin
“If you look at, you know, Hopper to Blackwell to Rubin, and you compare like for like, what is the performance per watt of a beefload-sixteen multiply? It hasn't improved all that much.”
Assertion Not checkable as stated
TSMC Performance Per Watt Barely Changes From 5nm to 2nm
“If you look at TSMC five nanometer versus four versus three versus two, the performance per watt on these chips doesn't change like a dramatic amount.”
Assertion Not checkable as stated
Cursor Forced Baseten, Fireworks, and Together to Prioritize Low Latency
“The challenge is, all those companies, you could take your pick, Base-Ten, Fireworks together, they all focus on low latency inference. And they were pulled in that direction by one very important customer Cursor.”
Prediction Not checkable as stated
Future AI Agents Will Prioritize Long-Horizon Task Completion Over Speed
“You wanted more persistence, more long horizon tasks, and now it's, to me, very obvious that the future of agentic inference is long horizon tasks. You're gonna run the machine for hours or days at a time. It doesn't matter if it spits out tokens at a hundred …”