RTL Generation
topic on 1 show · 1 statements across 1 episodes
1 statements about RTL Generation, every show
Haas: Verification and validation take more time in chip design than RTL
“Chip design can take anywhere from 24 to 36 months, depending on the complexity of the chip, et cetera. The actual design of the architecture, the RTL generation, if you will, the mapping of the architecture, Is not the largest amount of time. The largest amou…”