Pope predicts supply crunches across the entire AI hardware supply chain
Reiner Pope · Reiner Pope of MatX on accelerating AI with transformer-optimized chips · Feb 26, 2026 · at 18:54
MatX CEO Reiner Pope discusses manufacturing bottlenecks facing AI chip design companies and data centers.
0:00 / 0:33exact quote · 33.5s
▶ Watch the full episode on YouTube → 720p mp4 · rendered on demand · StarZero watermark
“The supply chain we're gonna have crunches on, on all of the supply chain, really. So if you look at the, sort of, the big components of what any company, but like us, for example, build-out there is dependency on Logic Dies from typically TSMC, maybe Samsung, or HBM, which are the big three HBM vendors, Hynix, Samsung, and Micron. And then there's also just the whole rack manufacturing, which includes I mean, literally just sheet metal and so on that builds the rack, but also cables and connectors because of all the high speed interconnect.”
quote is from the automated transcript, cleaned for reading: filler sounds and stutters are removed, nothing is rephrased. names can be misheard (the analysis reads context, assessments check outside sources). how →
More from Reiner Pope
Pope: Groq and Cerebras are uncompetitive on dollars per token
“And then there's the Grok and Cerebris that are much better at latency because they've got this the SRAM, weights are in SRAM very low latency. The problem is, and the challenge when you go to a Grok or a Cerebris system is that the throughput you get there, i…”
Pope: Google completely stopped publishing its AI research around 2022
“In twenty-twenty-two was about the time when just Google completely stopped publishing its research. And so all the good papers are from before that as a result.”
Pope: Model parameter counts will grow much faster than context lengths
“Really tied into this context thing, I think the context size will stay ballpark the same way it is, maybe a few times larger. But the parameter count will go up. Like, parameter count should grow much, much faster than context length, actually, just because o…”
Pope: The best AI inference chip is also a great training chip
“I think the best inference chip today will be a train, a really good training chip as well.”
Pope: MatX combines SRAM and HBM for cheap, low-latency AI chips
“It is actually possible to do both in the same chip. You, it's kind of an obvious thing. You say you take the HPM, you take the SRAM, put them together in the same chip, you put the weights in SRAM, and you put the all of the inference data in HPM. That is wha…”